Improvements to a Microelectronic Design and Fabrication Course

Bibliographic Data

ID20296173
AuthorsDavid Parent (0000-0003-0098-6749, San Jose State University), Eric Basham (San Jose State University), Yasser Dessouky (San Jose State University), Stacy Gleixner (San Jose State University), Gregory Young (0000-0001-9886-6205, San Jose State University), Emily Allen (0000-0003-2964-1189, San Jose State University)
Year2005
Volume48
Issue3
Pages497-502
Publication date2005-08-01
Peer ReviewedYes
Open AccessYes
TypeARTICLE
VenueIEEE Transactions on Education (JOURNAL)
Journal identifiersISSN: 0018-9359 • E-ISSN: 1557-9638
PublisherInstitute of Electrical and Electronics Engineers (IEEE) (PUBLISHER)
DOI10.1109/te.2005.849761
OpenAlexW2102103483
LanguageEN
Citations received3
References cited9

This paper presents improvements made to a complimentary metal-oxide-semiconductor (CMOS) fabrication laboratory course to increase student learning and student impact (enrollment). The three main improvements to the course discussed include: 1) use of a two-mask MOS process that significantly reduced the time students took previously to design, fabricate, and verify the electrical properties of a metal-oxide-semiconductor field-effect transistor (MOSFET) process; 2) students' use of a semicustom integrated circuit (IC) design that significantly reduced the average design and processing time of previous years; and 3) development and implementation of a system of course prerequisites, which allowed a larger number of students to enroll in the course

CMOS · Course (navigation) · Electrical engineering · Electronic engineering · Engineering physics · Fabrication · Integrated circuit · Microelectronics · MOSFET · Process (computing) · Semiconductor device fabrication · Transistor · Voltage · Computer Science · Engineering · Engineering Education and Curriculum Development · Experimental Learning in Engineering · Nanotechnology research and applications

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